Semiconductors

Global demand for semiconductors is skyrocketing, driven by artificial intelligence, the electric car, industry 4.0 and data centres. But manufacturing capacity is still concentrated in very few countries and companies. Supply chains are fragile. And geopolitics has put silicon at the center of the struggle between great powers.

Today, more than ever, where chips are designed and manufactured conditions the economic and strategic future of entire regions: the United States leads in design and platforms, Taiwan in advanced manufacturing, China accelerates to reduce its external dependence, and Europe is trying to regain weight in an increasingly concentrated and geopolitically sensitive ecosystem.

In this context, the latest Future Trends Forum (FTF) has brought together more than 40 international experts from industry, investment, technology and academia to answer a key question: What role can Europe and Spain play in the new geopolitics of the chip?

This text includes the main ideas discussed during the forum:

• The current state of the sector
• The technological and business advancements that are redefining the industry
• The big challenges to turn this opportunity into a solid strategy

From specialized talent to investment, from the leap from lab to factory and the need for “smart specialization,” FTF participants provided a shared vision on the key levers to compete on this new global chessboard.

Three major focuses of the debate

1. Understanding future demand: How the use of chips will evolve in tractor sectors such as automotive, aerospace, defence or telecommunications, and what implications it will have on performance, energy consumption, reliability or security.
2. Explore differentiation technologies: Opportunities in materials, packaging, new computing architectures, and business models that can open up competitive space.
3. Activate ecosystems capable of scaling: What kind of talent, alliances, regulatory and industrial instruments will be needed to build a strong European ecosystem.

Ajit Manocha, president and CEO of SEMI, points out that the sector is experiencing extraordinary growth and, at the same time, a moment of great fragility. He sums it up in two concepts: exponential growth and unprecedented momentum.

On the technological level, Manocha describes three major chained phases. First, the era of the Internet of Things (IoT), which has put sensors and connectivity in almost any device and has made the smartphone the universal interface. Then there is the current phase of artificial intelligence, enabled by very powerful processors (GPUs and CPUs made with technologies of 5 nanometers and below) and by an increasing proportion of “AI-ready” chips, capable of running machine learning algorithms efficiently. And, already looming on the horizon, the phase of quantum computing, which will not replace classical AI, but will coexist with it and reinforce it in certain very complex problems.

At the same time, miniaturization is approaching physical limits. The race for the most advanced nodes – such as the 2-nanometer one – involves working at near-atomic scales. To get an idea, a nanometer is a billionth of a meter, and at that scale the components of the chip are only a few tens of atoms wide. It is a physical frontier that defies the limits of miniaturization and where it is no longer enough to reduce size: it is necessary to rethink materials, architecture and energy efficiency. This situation does not imply the end of Moore’s Law – the idea that every few years the number of transistors on a chip doubles – but a transition to a “Moore 2.0”, in which progress will come less from shrinking transistors and more from new computing architectures, advanced packaging and innovation in materials.

On the industrial and geopolitical level, there is an extreme concentration of advanced manufacturing capacity: only two or three large factories specialized in manufacturing chips for third parties (the so-called foundries, such as TSMC, Samsung or Intel) can produce in the most advanced nodes. This limits competition and makes the entire chain very vulnerable to failures, crises or political tensions. The pandemic and recent conflicts have led to the treatment of semiconductors as critical infrastructure, triggering a wave of Chips Act-type laws and public programs to attract factories, R+D, and talent. Europe is already working on a Chips Act 2.0, in the design of which SEMI participates. Even so, there is a geographical imbalance: of some 150 new factories planned until 2030, only nine would be in Europe, with the consequent risk of losing even more relevance and industrial weight.

Challenges include a global shortage of skilled talent, trade tensions affecting access to markets, equipment and materials, and the impact of the energy crisis and environmental regulation on the costs and location of new plants. Europe should accelerate investment and regulatory decisions, giving Chips Act 2.0 greater ambition and focus on areas where the continent has real options (composite semiconductors for power, integrated photonics, industrial and automotive applications, specific areas of advanced packaging); and strengthening collaboration between regions, governments, companies and knowledge centres, as the only way to reconcile historic market growth with capacity, talent and resource constraints.

“PC, smartphone, artificial intelligence”. This is how María Marced, former president of TSMC Europe, summarises the three major waves that have marked the evolution of the semiconductor industry in recent decades.

In the last two decades, semiconductors have gone from 11th to 3rd place in the global ranking of economic benefit by sector, only behind advanced digital software and services and pharma/biotech. The market, which in 2021 was around 600,000 million dollars, could reach 1.3 trillion by 2030, driven by electric and connected automotive, advanced industrial applications and the expansion of artificial intelligence, both in large data centers and in devices that process data “at the edge” (edge computing).

This evolution has been marked by three major “waves”: first the PC, then the smartphone and now AI, which will drift towards “agentive” AI, capable of making more decisions and interacting autonomously with the environment, and physical AI, integrated into robots and embedded systems. It would not be a temporary bubble, but a structural and lasting change in the demand for chips.

In this context, Europe arrives with lights and shadows. It lost prominence in the PC era, but its champions (ST, Infineon, NXP) have established themselves in automotive and industrial, with very strong positions in:

• Microcontrollers, the programmable “brains” that govern specific functions within a vehicle or machine.
• Sensors and MEMS (microelectromechanical systems), small devices that combine electronics and moving parts to, for example, measure movement, pressure or vibration.
• Power semiconductors, essential for managing and converting electrical energy with high efficiency (e.g. in fast chargers or inverters).

The challenge is that many of these products are manufactured in mature nodes, that is, in less advanced manufacturing technologies than cutting-edge ones, easier to replicate in other regions. The interesting thing is that this technological base fits precisely into the next evolution of the sector: edge AI, an AI that runs on the device itself (vehicle, sensor, machine) and that needs to integrate computing power, intelligent sensors and minimal energy consumption.

The path that Europe should take is to develop platforms with integrated artificial intelligence for vehicles and industry; betting on domains where it already has clear capabilities -such as power, integrated photonics, sensors or specific packaging for automotive and industry-; and precisely define its specialization in the value chain, concentrating resources where it can build sustainable advantages, such as design, intellectual property or packaging.

Telecommunications: networks as a platform for artificial intelligence

Both Fredrik Jejdling, former Vice President of Business Area Networks at Ericsson, and Jesús Folgueira, Senior Manager of Transport & IP Networks at Telefónica, agree on a key idea: without capable communications networks, artificial intelligence cannot unfold its full potential.

From connecting people to programming the network

Mobile telephony today connects billions of people, but the role of the network is evolving substantially. It is no longer a system designed primarily for person-to-person communication – voice, messaging or video – and is transformed into a programmable infrastructure, capable of dynamically adjusting the quality of the connection depending on the use case, providing location information with high accuracy and offering secure authentication mechanisms in real time. This change turns the network into a technological platform on which advanced, industrial and critical services can be deployed, far removed from the traditional logic of communications consumption.

However, this evolution has not yet fully translated into value creation: 5G is not yet monetized as expected, since, although the capabilities exist, there is still a lack of business models that exploit them beyond the traditional “more speed and less latency”.

AI for the network and AI on the network

Both Ericsson and Telefónica distinguish two levels:

• AI to operate the network: they use artificial intelligence – including generative intelligence – to accelerate software development, optimize radio parameters, automate operations and improve signal quality. In advanced mobile networks, some problems can no longer be managed with classic software alone and require machine learning models that run on very powerful chips.
• The network as infrastructure for AI: Operators not only use AI internally, they must also prepare their networks to transport and run AI at customer premises, in data centers, and at edge computing nodes integrated into the network.

Hence the metaphor: mobile network and AI are “brothers and sisters”. AI does not scale without advanced 5G/6G networks, and those networks, in turn, need AI to manage and deliver differentiated services.

Advanced chips, new business models and "distributed data center"

Telecommunications depend on the most advanced chip manufacturing nodes:

• To be competitive in cost and performance, network providers are already downgrading to 3 nm and even 2 nm technologies.
• Hardware becomes more specialized, with radio-optimized chips and antennas that are much lighter and more efficient.

What is the challenge for Europe?

That today no European semiconductor manufacturer supplies these leading nodes, and the market is concentrated in a few global players. Large telecommunications companies are among the first major chip customers, but for years they have focused on tariffs, services and investment. Only with supply crises have they regained the awareness that the chip is a strategic asset.

On the business side, it is assumed that operators will not develop the major use cases of 5G or the so-called “networks for artificial intelligence” on their own. Value creation involves a change of approach: opening up key network capabilities through standardized APIs and exposing functions such as guaranteed quality of service, localization or security in a controlled way. This model allows developers and third parties to build new services on top of a global infrastructure, transferring innovation to the ecosystem and positioning the network as a platform on which opportunities beyond the traditional connectivity business are captured.

This move fits with decisions such as Nvidia’s entry into Nokia to bring AI computing capacity closer to the edge of the mobile network: the same equipment that today moves data and video is beginning to behave like a “distributed data center”, also executing AI loads close to the user.

Space and defence: technological keys to strategic autonomy

Space and defence push the frontier of what semiconductors can do and, at the same time, are at the centre of the conversation on technological sovereignty, as Javier Moreno, Director of Engineering Operations at Thales Alenia Space, José Miguel Pascual, Director of Innovation Centres at Indra) and Daniel Amor, founder of RBZ Embedded Logics, point out.

Space: state-of-the-art electronics in extreme conditions

The relationship between the space sector and semiconductors has changed radically in just two decades. Traditionally, satellites used components far removed from the state of the art of the civilian market, prioritising reliability over performance. Today, that gap has narrowed almost completely. Today, that gap has narrowed almost completely. Next-generation reprogrammable chips (FPGAs) with artificial intelligence capabilities are being qualified for space missions, as well as advanced processors very close to those used in commercial terrestrial applications. This approach opens the door to much more flexible and powerful architectures in orbit, but also introduces new technological challenges:

• Radiation: The space environment exposes devices to high-energy particles. Before, failures were detected by clear increases in consumption; With increasingly efficient transistors, radiation-induced errors result in minimal changes, much more difficult to measure and manage.
• Heat in vacuum: There is no air in space to help dissipate heat. There is only conduction within the system itself and radiation to the outside. By concentrating a lot of power on very small chips, the power density goes up and getting the heat out becomes a serious problem. Moreno believes that this thermal limit will be one of the immediate bottlenecks for using the new generation of semiconductors in orbit.

Institutionally, both the European Space Agency (ESA) and the European Union place space at the centre of technological sovereignty. Programmes such as Galileo (satellite navigation), future secure communications constellations such as IRIS², or the new generation of Copernicus (Earth observation) seek to ensure that, wherever possible, key solutions – including chips – have European origin.

The possibility of manufacturing semiconductors in space is even being explored. Microgravity offers theoretical advantages – such as “cleaner” environments or natural vacuum – and experiments are already underway on space stations. However, this is still a very nascent area, with significant unknowns about the feasibility of complete manufacturing processes and significant logistical challenges. Today, it is a long-term line of research, closer to technological exploration than to an immediate industrial solution.

Smart defense: by land, sea, air... And chip

Defense is facing an accelerated transformation of its technology needs, driven by rapidly evolving digital capabilities, rising geopolitical tensions, and the emergence of more complex and distributed threats. This new context redefines the role of semiconductors as a critical element in virtually all operational domains.

In the maritime and underwater environment, the protection of critical infrastructures – such as cables, sensors and communication systems – is becoming increasingly important. Technologies such as photonics allow the development of new types of sensors and communication links with greater performance, reliability and resistance in harsh environments. At the same time, space dominance is consolidating itself as a key strategic area: ensuring safe navigation and geolocation, monitoring objects in orbit and detecting satellites or space debris requires high-powered radars and advanced systems based on increasingly sophisticated radiofrequency semiconductors and photonics.

Although defence continues to require highly mature and certified technologies, the time frame for incorporating them is significantly reduced. This drives a systematic search for better size, weight, power consumption and cost ratios (SWaP-C), with more compact, lighter and more efficient systems, especially at the edge, such as field-deployed sensors or on-board platforms. In this context, artificial intelligence is moving to the edge (Edge AI), allowing sensors and systems to make decisions locally without relying on remote command centers.

All this converges in the development of a “combat cloud“: an architecture that integrates information from the terrestrial, maritime, air, space and cyber domains, supported by robust communications and advanced semiconductors deployed at all levels of the system.

To materialize this vision, heterogeneous integration is key, combining very different chips in the same system – high-power radio frequency, photonics, digital processors or memory – to achieve compact, connected and high-performance solutions. At the same time, dual technologies play a central role: many critical capabilities in defence come from civilian developments, the volume of which justifies the investment, while the specific effort must be concentrated in those areas that the civilian market does not cover.

More than cars: technological platforms on wheels

Rutger Wijburg, former Chief Operating Officer (COO) of Infineon Technologies, and Miguel Chanca, head of radar circuit design and line manager at Bosch Spain, agree on the diagnosis: the car has stopped moving forward based on gradual improvements. What is happening is a change of stage. From electrified vehicles, we are moving at great speed to the software-defined car, and in this leap, semiconductors are not just another component: they are the core that makes transformation possible.

Many more chips per car

The transformation of the automobile is clearly reflected in the semiconductor content per vehicle. Just two decades ago, the value of chips incorporated into a car was around $100–200. Today, an average vehicle already integrates about $950 in semiconductors, the most advanced models exceed $1,100 and forecasts suggest that this figure could reach $2,000 per car as electrification and automation advance.

This growth is not due to an increase in the number of vehicles produced – the global market remains around 90 million units per year – but to the profound technological transformation of the automobile. The electrification of the powertrain, advanced assistance and automated driving systems, communications and infotainment, together with the emergence of new digital services linked to the use of the vehicle, are turning the car into an increasingly complex and chip-intensive electronic platform.

The software-defined car

The transformation of the automobile goes beyond incremental evolution and approaches a paradigm shift. The vehicle is now conceived as a software-defined system, in which electronics and code determine both mechanical behavior and user experience. This approach brings the car closer to the logic of digital devices: features that are updated via software, functions that are activated or downloaded on demand, and continuous integration with the user’s digital ecosystem.

In this new model, the vehicle is no longer a static product but a platform in constant evolution, capable of offering new capabilities throughout its useful life and renewing the user experience with each major update, similar to the feeling of “brand-new” a device after a significant software improvement. The current development can be summarised in four pillars:

1. 1. Electrification.
   2. Autonomous and assisted driving.
   3. Communications (vehicle connected to other vehicles and to infrastructure).
   4. Personalization and user experience, digitally defined.

This change also transforms the vehicle’s internal electronic architecture. Compared to previous models, in which each function had its own control unit and hundreds of ECUs per car were integrated, the current trend is towards a reduced number of much more powerful units, organised by functional domains or areas of the vehicle. The key challenge is to precisely define the boundary between hardware and software, so that both are designed in a coordinated way and the available computing power is fully exploited.

Where Europe can lead (and what it has learned from supply shocks)

In the final debate, it is directly asked whether Europe can lead the car electronics of the future.

The strengths are clear:

• Europe has a proven track record as a reliable supplier of automotive components.
• Companies such as Infineon, NXP and STMicroelectronics occupy global leadership positions (Infineon is the world’s largest supplier of automotive semiconductors, also in China).
• The European group is particularly strong in analogue electronics, sensors, power and industrial/automotive applications.

From this base, Europe is still in a position to compete, but it requires a change in attitude. It involves assuming that a significant part of the innovation is already taking place in China and other non-traditional markets, and reacting more quickly and realistically. It also requires more ambition and energy in implementation, accepting higher levels of risk, and a determined effort to rebuild the European role in various links of the value chain, rather than concentrating solely on isolated vehicle components.

Europe also has significant assets on which to rest. It has a strong base of engineering talent, deep system knowledge accumulated in vehicle manufacturers and large suppliers, and growing capabilities in alternative technologies to conventional silicon, such as silicon carbide (SiC). These technologies allow for the development of more efficient and robust chips, and are especially strategic for applications such as electric vehicles or fast-charging infrastructures.

A change of approach in the conception of the vehicle is also necessary. The transition goes from “putting a computer in the car” to “putting wheels on a computer”, a logic already very visible in markets such as China, where value is concentrated in design, software, services and business model, while assembly becomes increasingly interchangeable.

The recent supply crises have also left clear lessons for the industry. The number of chips per vehicle has gone from tens to hundreds, so that the interruption of a seemingly simple component can paralyze an entire plant. Despite the fact that after each crisis a revision of the just-in-time model is announced, when financial pressure returns, the sector tends to reproduce the same patterns of vulnerability.

The closing message links to the rest of the forum: the answer lies in rebuilding a more complete European ecosystem, covering everything from advanced chips to the simplest components, reducing single points of failure in the automotive supply chain.

After listening to what sectors such as telecommunications, defence, space and automotive demand, the forum lands on the major technological levers that must respond to these needs. From embedded photonics to advanced packaging, new computing architectures or emerging materials, the goal is to map out the roadmaps that will make the next generation of chips and electronic systems possible.

Integrated photonics: when light binds to silicon

Philippe Absil, Vice President at IC-Link / imec silicon solutions, Andy G Sellars, Director of Strategy at Cornerstone and at the Optoelectronics Research Centre at the University of Southampton and Valerio Pruneri, Director of the PIXEurope pilot line, professor at ICREA and group leader at ICFO, explain why integrated photonics is in its moment and what is at stake for Europe.

A recent development clearly illustrates where the market is moving. Marvell Technology has announced an agreement to acquire optical interconnect startup Celestial A Ifor about $3.25 billion, motivated by its integrated photonics technology for AI data centers. The message is unmistakable: the market is already assigning “unicorn” value to solutions that combine silicon and light as a way to alleviate the energy bottleneck of AI. It is not a minor detail that this technology emerged in close collaboration with imec, whose imec.xpand fund was its first institutional investor, one more example of a recurring dynamic: Europe is capable of generating science and intellectual property of enormous value, although often the final economic capture occurs outside the continent.

This move connects with an increasingly accepted underlying idea: if artificial intelligence is going to be the main growth driver of the semiconductor sector, energy becomes the limiting factor. Compute capacity is growing exponentially, but so is the energy needed to move data within AI data centers. While fibre optics are already the standard over long distances, within the systems themselves, electrical interconnections are beginning to reach their physical and energy limits.

Integrated photonics responds precisely to this challenge, by bringing light closer and closer to the computing chip: from pluggable optical modules of very high capacity to optical interconnects on the board itself and, progressively, from chip to chip. This integration is emerging as a central element in future AI data center architectures, with the goal of dramatically reducing the power consumption associated with internal communications and unlocking the next phase of advanced computing scaling.

Cornerstone, an open integrated photonics foundry located at the University of Southampton – a shared infrastructure that allows companies and research centres to manufacture their own chips without having their own facilities – has seen a clear transition from purely electronic systems to hybrid architectures in which microelectronics and photonics are integrated narrowly. This integration can be embodied both in a single package and through modular approaches based on chiplets, which are combined into a single system.

Applications for this convergence range from high-performance data centers to distributed sensors to AI at the edge. Among the most illustrative examples are GPS-independent quantum positioning and navigation chips – critical for defence or underwater vehicles as they are immune to interference – and on-chip medical diagnostic solutions, capable of measuring the concentration of a drug from a single drop of blood in minutes and adjusting the dose in near real-time.

In integrated photonics, silicon is a key enabler, but not sufficient. Although it supports many processes, it does not allow lasers to be generated on its own or to cover all the necessary modulation and detection ranges. For this reason, advanced photonic architectures combine multiple materials:

• Glass and nitrided silicon for low-loss waveguides.
• III-V semiconductors, such as indium phosphide, for high-speed lasers and emitters.
• Specialized materials such as lithium niobate or barium titanate for extremely precise light modulation.
• New materials, such as graphene or quantum dots, for faster or wavelength-adjustable devices.

The central challenge lies in hybrid integration: stacking and combining very different materials without degrading their properties and with repeatable and scalable industrial processes.

The good news is that the continent is not starting from scratch:

• Imec has been setting the roadmap in micro and nanoelectronics for decades and already offers an integrated photonics platform used by several foundries.
• Cornerstone enables companies and centers around the world to experiment and bring their designs to product using shared wafers.
• PIXEurope, the integrated photonics pilot line of the Chips Joint Undertaking, coordinates platforms in different materials and seeks precisely to demonstrate its industrial scalability.
• It has recently been announced the creation of imec’s “Fab 5” in Malaga, the first extension of its cleanroom capabilities outside Belgium, designed to accelerate innovation in new materials directly on production equipment.

Together with the design work already being done in Barcelona, Spain is beginning to position itself as a visible node in the European photonics and new materials network, aligned with the semiconductor agenda and the PERTE Chip.

Advanced packaging and heterogeneous integration: when chips stop going separately

Muhannad Bakir, director of Georgia Tech’s 3D Systems Packaging Research Center, Sung Jin Kim, chief technology officer (CTO) at Absolics , and Jekaterina Viktorova, CEO and co-founder of Syenta have a very clear common message: the next big semiconductor revolution doesn’t just come from making smaller transistors, but from how we package and connect chips to each other.

What is heterogeneous integration and why it matters

Heterogeneous integration refers to an advanced packaging approach that allows to bring together, at a very short distance and within the same module, chips with different functions and technologies – computing, memory, radio frequency or photonics. With this, the traditional boundary between what happens “inside the chip” and what is “outside”, on the board, begins to be diluted, giving rise to much more compact and tightly coupled systems.

In conventional designs, the processor, memory, and other components are encapsulated separately and connected through the board, spanning inches of electrical interconnects. This model significantly penalizes power consumption, latency, and bandwidth, to the point that a substantial portion of the energy in a data center is simply used to move data, not process it. Advanced packaging and the drastic reduction in distances enabled by heterogeneous integration directly attack this bottleneck, becoming a key factor in scaling the performance of advanced digital systems.

Chiplets: Moore continues, but not at any price

The use of chiplets responds, first of all, to an economic logic. In advanced nodes such as 3 nanometers, designing large monolithic chips is extremely expensive: the throughput per wafer decreases and the cost of silicon skyrockets. In contrast, the chiplet-based approach proposes to divide the design into smaller blocks, easier to manufacture with high yields, and then recombine them in the package as functional modules.

This model allows for very significant cost reductions – in some cases close to 50% of the cost of silicon – and avoids physical limitations such as the maximum size imposed by lithography. This is the approach already used by players such as AMD to build high-performance CPUs and GPUs from multiple interconnected chiplets, demonstrating their large-scale industrial viability.

From a historical perspective, this transition is reminiscent of the one that gave rise to the integrated circuit in the 1950s and 1960s, when the so-called “tyranny of numbers” made it unfeasible to continue scaling through the individual connection of transistors. A similar situation is being replicated today, but at the level of systems and chiplets, pointing to a new wave of radical innovations in packaging and system architecture.

Fast chips, slow connections: AI's Achilles' heel

Analysis from the perspective of artificial intelligence in data centers highlights a structural imbalance. Over the past three decades, compute density has grown by more than six orders of magnitude, while interconnection density —the “highways” that connect chips and memory— has grown by barely two. This shifts the main bottleneck from the transistor to the packaging: the ability to bring memory and compute closer together with sufficient connection density becomes the limiting factor to further scaling the performance of AI systems. Added to this is an additional risk: the manufacture of very high-resolution interconnects is today concentrated in a very small number of suppliers, generating critical dependencies for the entire ecosystem.

In this context, Syenta develops its own technology for additive manufacturing of copper interconnects, aimed at producing extremely fine traces through simpler processes than the current ones. The goal is to bridge the gap between the evolution of transistors and interconnects, increasing the internal bandwidth of systems, alleviating capacity bottlenecks, and improving productivity. This approach also opens up a more accessible way for regions such as Europe to advance in advanced packaging without the need to undertake the massive investments associated with state-of-the-art node factories, such as 2-nanometer factories, the most complex and expensive in the industry.

Glass as a new substrate: from the "space transformer" to the "space transporter"

Absolics focuses on one of the least visible, but most critical levers of advanced computing: advanced substrates. The context is clear: the demand for high-performance computing (HPC) and artificial intelligence continues to grow unabated, driven not only by traditional chip manufacturers, but also by large cloud operators, which impose increasingly demanding requirements on performance, energy efficiency and scalability.

In this scenario, 2.5D packaging – which groups several chips on the same basis to improve their interconnection – is beginning to show its limits in the face of the needs of the next decade. Advanced systems aim for much higher connection densities, drastically reduced electrical distances, and architectures that integrate trillions of transistors into a single array.

This forces us to rethink the role of packaging: it is no longer a simple “space adapter”, which translates the density of the chip to that of the board, to become a true “space transporter”, jointly optimizing signal paths, power delivery and thermal dissipation.

In this paradigm shift, glass emerges as a particularly promising substrate:

• It offers mechanical and thermal properties very close to those of silicon.
• It allows you to adjust its coefficient of expansion.
• It provides an extremely smooth surface, ideal for high-speed signals and photonic integration.

Absolics works with large-format glass panels in which it integrates passive components and directly mounts GPUs and HBM memories, reducing electrical travel that was previously centimeters to just a few tenths of a millimeter. The result is a significant decrease in losses, energy consumption and heat generation.

The journey from research to industrial production is long: the transition from the laboratory at Georgia Tech to the first operational factory in the United States is around a decade, a period that illustrates well the time needed to mature and scale this type of structural technology for the future of computing.

Advanced packaging: the new technological front where Europe can play

Advanced packaging emerges as one of the most realistic ways for Europe to strengthen its position in the semiconductor value chain. The analysis converges on several key points:

• The CAPEX (investment in equipment and facilities) of an advanced packaging factory is at least an order of magnitude lower than that of a fab of leading nodes. There is no need to invest tens of billions: it is a much more affordable bet if it is aimed at sectors where Europe is already strong – such as automotive, telecommunications or industry – or to test rapid prototyping solutions for supercomputing and networks.
• Advanced packaging, however, is very complex: it requires co-optimizing power, thermal, interconnects, photonics and 3D stacking in a very small space. The logic of “first I make the chip and then someone encapsulates it” no longer applies: you have to co-design chip, substrate, interconnects and heat dissipation from the beginning.
• The first players (such as Absolics or large manufacturers that design and manufacture their own chips) accumulate a lot of intellectual property, but their own customers push them to collaborate and license technologies, opening windows of entry to new partners and regions.

The final message is twofold: On the one hand, the playing field is still open. In advanced packaging “we are still in the small wave”, with room for new players to enter, especially in high-resolution interconnects, advanced substrates and integrated power and thermal solutions.

On the other hand, time counts: if Europe wants to seize this opportunity, it must invest now in R+D and industrial packaging capacities, and take ideas from lab to factory before others consolidate the next generation of infrastructure for AI and high-performance computing.

Advanced architectures and new forms of computing

Heike Riel, IBM Fellow, Head of Quantum Technology Science and Information and leader of IBM Research Quantum for Europe, Middle East and Africa, Antonino Albarrán, Director of Technology Alliances at Openchip and Osman Unsal, Senior Researcher and Group Leader at the Barcelona Supercomputing Center – BSC, address the same question from complementary angles: how to continue to gain performance when energy costs and computing complexity no longer allow “doing more of the same”. Their conversation draws a paradigm shift: we went from relying on a dominant architecture to building hybrid systems – with accelerators, in-memory computing, neuromorphic, open hardware and co-design – on which Europe can still decide whether it aspires to lead or depend.

From the brain to the chip: rethinking how we calculate

A state-of-the-art European supercomputer like Jupiter can consume around 15-20 MW, while a human brain works with only about 20 watts. This huge gap highlights a structural problem in today’s computing, still based on von Neumann’s architecture, where processor and memory are separated and data must travel continuously between them, with a high energy cost associated with the simple movement of information.

To address this fundamental limit and move towards much more efficient systems, three main lines of work are proposed aimed at rethinking the architecture of computing beyond traditional schemes:

• Specialized accelerators for AI (such as TPUs (Tensor Processing Units) or IBM’s NorthPole-type chips), which integrate logic and memory very closely for specific tasks and are much more efficient than a general CPU.
• In-memory computing, where part of the mathematical operations are done within the memory itself, reducing data traffic. Today it is mostly explored for the AI inference phase.
• Neuromorphic computing, which attempts to mimic how the brain and neurons calculate, with chips processing information in the form of activity spikes rather than traditional numbers.

The message is clear: the future of computing will not be an exclusive choice between classical, quantum or neuromorphic architectures, but a combination of approaches. The key will be in the co-development of algorithms and hardware, jointly adapted to maximize performance and substantially improve energy efficiency.

RISC-V and Open Hardware for Europe

Openchip, a Barcelona-based company specialising in hardware accelerators for artificial intelligence and high-performance computing, focuses on RISC-V as a strategic alternative to the dominant architectures, x86 – hegemonic in PCs and servers – and ARM, widely used in mobile and automotive. RISC-V is an open, single-owner architecture that introduces a different logic into processor design.

From a technical point of view, its modular and flexible nature allows specific extensions to be added – for example, security – and to adapt to a wide range of applications, from very low-power microcontrollers to supercomputing systems, with a structural emphasis on energy efficiency.

On the business level, the absence of royalties, the possibility for multiple providers to implement the architecture and the construction of a collaborative ecosystem, inspired by the open source software, reduce barriers to entry and technological dependence.

This approach shifts the center of gravity toward the software. No matter how powerful a chip is, its value is limited if there are no mature tools that facilitate its programming, from training AI models to running scientific simulations. Migrating large software bases from x86 or ARM to RISC-V is a significant endeavor that is only feasible if approached collectively, at the ecosystem scale.

For Europe, this model opens a relevant window in terms of digital and technological sovereignty, provided that sustained funding, specialized talent and a long-term vision are combined. The development of a chip is not immediate: from design to validation in real silicon can take between two and four years, a horizon that requires patience and continuity in the bet.

The role of the BSC: a high-risk think tank

The Barcelona Supercomputing Center (BSC) acts as a real testing ground for architectures and approaches that the industry cannot yet assume due to its level of risk or the deadlines needed to mature them.

In this environment, alternatives to conventional GPUs for certain supercomputing problems are explored, such as specialized vector processors, as well as computing paradigms close to data – in memory or close to storage – aimed at drastically reducing the movement of information. Specific accelerations for extremely computationally intensive algorithms, such as those in bioinformatics, post-quantum cryptography or homomorphic encryption, are also being investigated.

The key to this approach is the co-development of hardware, software, and applications. Chip manufacturers, domain scientists, and developers work together to identify real-world bottlenecks and validate solutions in near-end-use conditions. Many of these ideas, initially high-risk, end up laying the foundations for commercial products and architectures years later, reinforcing the BSC’s role as a bridge between advanced research and industry.

New materials beyond silicon

Ana Cremades, professor in the Department of Materials Physics at the Complutense University of Madrid, and Daniel Granados, director of the Madrid CITT in Semiconductors and research professor and director at IMDEA Nanoscience, agree on two ideas: the future of microelectronics lies in a much broader palette of materials, and that palette will only have an impact if it can be integrated into the silicon chain at a reasonable cost.

A new "periodic table" for electronics

The term “semiconductors” today encompasses a diverse set of materials and technologies that converge beyond silicon. Among the most relevant are:

• Broadband semiconductors such as silicon carbide (SiC) or gallium nitride (GaN), key to power electronics (fast chargers, inverters, e-mobility) and applications in extreme environments.
• 2D materials (such as graphene or molybdenum disulphide), with layer-by-layer adjustable electronic and optical properties, with the potential to create extremely miniaturized transistors and devices with novel functions.
• Ferroelectric and phase-change materials, essential for memories that preserve data without power and for building artificial synapses on chips that function in a similar way to the human brain (neuromorphic computing).
• Materials for photonics and quantum, necessary for integrated lasers, single photon emitters and quantum sensors.

Ultimately, silicon will continue to be the backbone of the ecosystem, but it is not enough on its own. Heterogeneous integration will be the key mechanism to incorporate these new materials and sustain emerging architectures in advanced computing and electronics.

From the laboratory to the factory: integration and cost

The evolution of semiconductors is not only due to the increase in the number of transistors. Already in the original formulation of Moore’s Law , there was a cost curve per function that first descends and then grows again. Today that tension is evident: transistors continue to scale, but each new node is more expensive. In this context, talking about advanced materials forces us to go beyond scientific demonstration and raise key questions about the possibility of wafer-scale manufacturing, its compatibility with standard silicon processes and, above all, its economic viability for real markets.

The transition from laboratory to industrial production is long and complex. Scaling a technology can take two to three decades, and the main obstacle is usually not the lack of cutting-edge science, but the absence of a “science of failure”: identifying, understanding, and documenting the integration problems that prevent turning promising results into reproducible and competitive processes.

Looking ahead, the convergence of nanotechnology and artificial intelligence is emerging as a key driver of discovery. Many of the materials that could underpin future architectures do not exist in nature, and AI will make it possible to explore unintuitive combinations and propose candidates with desirable properties, which will then have to be synthesized and integrated. In neuromorphic computing, this logic points to a long-term conclusion: it will be necessary to develop devices whose physics are actually close to that of a neuron, rather than continuing to emulate it using thousands of transistors

In short, new materials are necessary, but they will only add value if integration and cost are part of the equation from the start. For Europe and Spain, it is not enough to have excellent science in materials; It is essential to build stable bridges between the laboratory and the factory and also to finance the less visible work of identifying integration barriers, if these advances are to end up materializing in real chips and not remain only in scientific publications.

Conclusions of the Technology block: a puzzle, not loose pieces

The technology plenary session serves to bring together the pieces seen in integrated photonics, advanced packaging, computing architectures and new materials. The provocative question that is thrown into the room – “if we had 1,000 million euros to invest in just one of these technologies, where would we put them?” – you end up with a clear answer: the question cannot be answered: experts insist that these areas are deeply interdependent: quantum computing needs new materials and often integrated photonics; Advanced packaging connects copper and light in one system; large AI clusters require more GPUs, better interconnection, and different architectures at the same time. Betting on a single “box” is not enough: if Europe wants to be relevant, it needs excellence in several of these pieces at the same time, with specialisation, yes, but understanding that none of them lives alone.

Beyond lithography or advanced nodes, the future of semiconductors is at stake in the creation of ecosystems: countries capable of aligning industry, talent, capital, regulation and demand so that factories are built, design flourishes and deep tech scales. This block analyses Asian models, the real structure of the global value chain, the challenges of talent, design and IP, the move from the laboratory to the factory and what investors are looking for in this sector.

Asia's strategy on chips: what Europe can learn from Taiwan and India

Colley Hwang, founder and president of DIGITIMES, and Alejandro Sinekoff, head of Strategic Alliances, Partnerships and Marketing at L&T Semiconductor Technologies Ltd., with extensive experience in India, put on the table a very useful comparison for Europe: how Taiwan and India have built competitive positions in semiconductors from different levers. Leaving geopolitics aside, the focus is on ecosystem engineering: what is decided to be developed, how the value chain is coordinated, and what instruments – industrial, regulatory, and market – allow the effort to be sustained for years.

The comparative analysis of different national models leaves clear lessons for Europe. In Asia, ecosystems such as Taiwan’s have been built incrementally and highly concentrated, relying on a dense base of electronics companies, strong geographic proximity, and large manufacturers capable of investing billions of dollars in advanced capabilities. These industrial anchors drag the entire value chain – materials, equipment, design, systems and applications – and enable rapid cycles of learning and reinvestment. The lesson is that it is not enough to have cutting-edge factories: it is necessary to articulate a complete, highly connected ecosystem with critical mass.

Other countries such as India followed a strategy focused almost exclusively on designing chips for third parties for decades, accumulating talent and engineering capacity, but without developing the rest of the chain. The recent change involves activating domestic demand through regulation – for example, by raising efficiency requirements on high-volume products and linking them to local design or manufacturing – and by connecting design, product and certain industrial capacity. The conclusion is that subsidies, by themselves, are not enough: regulation and the domestic market are equally decisive levers.

Three key messages for Europe emerge from these experiences:

• It is essential to clearly define which links in the value chain you want to develop, assuming that it is not possible to cover them all.
• The European Union must overcome fragmentation and move towards a flexible “Made in Europe”, aligning capacities and specialisations between countries; and, above all:
• To regain ambition and appetite for risk, learning from Asia and building solid positions in driving sectors such as automotive, industry or energy.

The semiconductor ecosystem: a "Swiss watch" of extreme complexity

Daniel Granados and Philippe Absil They help us understand why the chip is, in fact, the visible tip of an industrial system of extreme precision.

The conversation underscores the deeply orchestral nature of the semiconductor industry. The value chain resembles a Swiss watch: the final chip is only the visible part, but behind it there are hundreds of process stages, materials and highly specialized equipment that must fit together with extreme precision. Making an advanced chip involves coordinating hundreds of consecutive steps, and losing one or two technological generations can put an actor out of the game for years.

No one company or country controls the entire process. The semiconductor industry is, by definition, a global and interdependent system, in which competitiveness depends both on excellence in each link and on the ability to coordinate between all of them.

In this context, imec is consolidated as a relevant example of a European platform for pre-competitive collaboration. Companies competing in the market cooperate in this environment to address common technological challenges – such as EUV lithography, the technology that allows transistors as small as a few nanometers to be defined on silicon wafers – under a carefully designed model of intellectual property management. This scheme combines a core of shared technology with specific projects for each partner, balancing collaboration and competitive differentiation.

On a European scale, the ecosystem has historically been marked by fragmentation and overlap between large applied research centres (imec, CEA-Leti, Fraunhofer, etc.). However, the European Chips Act has begun to promote greater coordination and complementarity between actors. Initiatives such as ESMC – the consortium that brings together TSMC, Infineon, Bosch andNXP, with the possible incorporation of ST – illustrate a pragmatic approach: they start from a specific industrial demand, as mature nodes for automotive and industry, and build manufacturing capacities gradually, before aspiring to cutting-edge technologies.

Form, Attract, and Retain: The Other Race for Semiconductors

Ana Cremades and Heike Riel address the factor that can decide the success or failure of any industrial strategy in semiconductors: talent.

Spain and Europe face a significant challenge in human capital for semiconductors. Estimates point to the need to incorporate around 5,000 new professionals in Spain by 2030 and about 50,000 in Europe, in a context marked by the fall in STEM vocations. Although there is a good foundation in physics, materials and engineering, a key gap remains: low exposure to real industrial environments, with a deficit of profiles such as cleanroom technicians, process specialists or experts in compound semiconductors.

Added to this lack are new layers of skills that become critical:

• Artificial intelligence as a transversal tool that should be part of the basic profile of any technician or engineer.
• Quantum computing, which requires starting today to train those who will use it in an applied way in the next decade.
• Algorithms – classical, AI and quantum – which are emerging as one of the main bottlenecks of the system.

The problem is not only quantitative, but also cultural. The drop in enrolments in physics and engineering reflects a lower willingness to take on long and demanding studies. To reverse this trend, measures are pointed out such as greater practical exposure from early stages, mixed university-business programmes, micro-credentials and more flexible training paths that allow reorientation throughout the professional career, incorporating areas such as AI or quantum as a “second literacy”.

Finally, talent retention emerges as a structural challenge. Significantly lower salaries compared to the United States or Asia, the limited presence of industrial R+D and the low visibility of the real impact of semiconductors on society make it difficult to consolidate attractive careers. Added to this is the low participation of women, which means, in practice, giving up a substantial part of the available talent.

Design to scale: the value is in the reusable design, not the isolated patent

Jimena García-Roméu, CEO of Alcyon Photonics, and José Bueno, Former Director of Product Management at ASML and Samsung focus on the point where deep tech becomes (or does not) become an industry: design, usable intellectual property, standards and factory adoption.

Chip design is the point where the technological problem is formulated and solved and where a substantial part of the added value is concentrated: it acts as a bridge between science and industrial products. However, an isolated patent rarely has economic value on its own. For industry, relevant intellectual property is articulated in reusable IP blocks, which solve specific problems, are repeatable, are integrated into standard processes and tools, and can be efficiently licensed. Europe generates abundant intellectual property of academic origin, but finds it difficult to transform it into these scalable industrial assets. In integrated photonics, this gap is especially visible: there is scientific talent, but there is a lack of IP champions with the critical mass needed to compete globally.

From a manufacturing perspective, introducing a new technology in a production plant involves a high risk and is only justified if it provides clear and measurable improvements in key indicators: performance, productivity or cost. The industrial logic is strict and based on verifiable data, not promises. Value needs to be demonstrated through robust, repeatable testing in representative environments, beyond lab results. All of this is also supported by well-established industry standards – SEMI, wafer formats, interfaces, automation – which are extremely costly to change, making any disruption unfeasible that is not supported by a strong business case.

From prototype to product: the real valley of death in deep tech

Antonio Mesquida, CEO of Tech-Diligence, Francisco J. Diaz, CEO of SPARC (composite semiconductor foundry in Galicia), and Jekaterina Viktorova, analyze the most difficult stretch for European deep tech : converting laboratory results into scalable industrial processes.

Europe has historically concentrated much of its investment in large companies and technology centres, but has dedicated far fewer resources to hardware startups and scale-ups. The first “valley of death” – moving a technology from the laboratory to a first functional prototype – is relatively covered. The second – turning that prototype into a product that can be manufactured on an industrial scale – remains one of the main weaknesses of the European ecosystem.

To close this gap, pilot lines, also known as lab-to-fab initiatives, are playing a key role. These infrastructures allow startups to test their processes in real industrial environments, generate data comparable to industry standards and, if the results are positive, transfer the technology to commercial foundries. The future InnoFab in Cerdanyola, aimed at mature technologies, is an example of this pragmatic approach to reduce risk and accelerate industrialization.

The experience of SPARC, a foundry of composite materials (InP, GaAs, GaN) born as a university spin-off , illustrates well the cultural change needed. Moving from the lab to the factory means moving away from measuring success in terms of publications to wafer performance, process repeatability, and final product quality. This leap also reveals a bottleneck shared with the talent field: the shortage of cleanroom technicians. Without coordinated planning, the simultaneous deployment of multiple factories in Europe could end up generating internal competition for the same critical profiles.

From the startups’ perspective, the lesson is equally clear. In semiconductors, trust is built on industrial data, not promises. Validation in metrics recognized by the sector, together with equipment manufacturers or consolidated players in advanced packaging, marks the turning point. Thinking about scalability and cost from day one – asking yourself whether a technology can be manufactured tomorrow in a standard fab at a competitive price – is essential to avoid discovering too late that a technically brilliant design is not industrially viable.

Investing in semiconductors and deep tech: what capital is looking for

Sundar Ramamurthy, corporate advisor at Temasek and the incubator Xora Innovation, Ken Phua Tin, global CEO at XG Technologies and advisor at K3 Ventures and Bluechip Ventures, and David Lopez, partner at BeAble Capital, a fund specializing in very early stage science, demystify what it means to invest in semiconductors and deep tech. From his experience, capital does not pursue “good ideas” in the abstract, but teams capable of executing through long and expensive cycles, with real traction in the value chain, clear technological advantages and a credible route to manufacturing with good performance.

Investing in semiconductors follows a very different logic from software: it requires large volumes of capital, long time horizons, and high discipline in execution. From the investor’s perspective, the key signals are founding teams with a strong technical profile and experience in bringing technology to market, a tangible interest in the value chain – foundries, IDMs, OEMs or large end users – improvements of order of magnitude compared to the state of the art and a clear roadmap towards a manufacturable technology with solid industrial yields.

Added to this vision is the emphasis on market fit and strategic execution. In semiconductors and deep tech, capital prioritizes solutions that solve specific customer problems over technological advances without a defined application. Beyond technical quality, the team’s ability to precisely define its target market, iterate with customers from early stages and adapt to the real dynamics of the value chain is valued. Scaling this type of technology requires making strategic decisions from the beginning – how to enter new markets, how to balance control and speed, how to protect intellectual property – and building the organization with realistic and sustainable international scalability in mind.

From the field of early scientific investment, BeAble Capital represents a particularly demanding approach. The fund comes in when there are only papers and prototypes, as long as the potential market is very large, the technology is genuinely differentiating and the team is willing to make the leap from the laboratory to the company. This experience reinforces a recurring conclusion: without a strong venture capital industry, it is very difficult to consolidate a solid industrial base in semiconductors. The gap is significant: while the United States mobilizes around 300,000 million dollars per year in VC, Europe is around 50,000 million euros, with an even greater difference in the earliest phases.

There is, however, consensus that European public money is still a necessary lever, but it must be used with greater discipline. The aim is to avoid the proliferation of “zombie companies” dependent on successive subsidies and to move towards schemes that combine public aid with private co-investment and specific scale-up funds. Only in this way will it be possible to prevent many European deep techs from ending up being sold prematurely to players in the United States or Asia.

The final message of this block is that ecosystem, talent, design, lab-to-fab and investment are deeply intertwined: without aligning these pieces, it is difficult for Europe to go from being a great generator of ideas to becoming one of the poles that mark the future of the global semiconductor industry.

After two days of debate, the feeling shared by the experts of the Future Trends Forum is clear: Europe is not starting from scratch, but it needs to accelerate. The continent accumulates authentic “crown jewels” in materials, equipment, automotive, photonics, health, defense and centers such as imec or CEA-Leti, as well as first-rate scientific talent.

The gap between scientific capabilities and industrial value capture is today the main strategic risk for Europe.

The consensus of the participants is articulated in an immediate action agenda for Europe to regain a top-level leadership in semiconductors and advanced computing, structured in six priorities: